instruction complexity

instruction complexity
сложность команды (команд)
для повышения эффективности работы конвейера (см. pipelining) машинные команды должны быть примерно одинаковой сложности, что нашло отражение в ЦП с сокращённым набором команд (см также instruction set, RISC)

Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. . 1998-2007.

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Смотреть что такое "instruction complexity" в других словарях:

  • Instruction level parallelism — (ILP) is a measure of how many of the operations in a computer program can be performed simultaneously. Consider the following program: 1. e = a + b 2. f = c + d 3. g = e * fOperation 3 depends on the results of operations 1 and 2, so it cannot… …   Wikipedia

  • Instruction creep — occurs when instructions increase in number and size over time until they are unmanageable. It can be insidious and damaging to the success of large groups such as corporations, originating from ignorance of the KISS principle and resulting in… …   Wikipedia

  • Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… …   Wikipedia

  • No instruction set computing — (NISC) is a computing architecture and compiler technology for designing highly efficient custom processors and hardware accelerators by allowing a compiler to have low level control of hardware resources. Contents 1 Overview 2 History 3 See also …   Wikipedia

  • Very long instruction word — or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism (ILP). A processor that executes every instruction one after the other (i.e. a non pipelined scalar architecture) may use processor resources… …   Wikipedia

  • NC (complexity) — Unsolved problems in computer science Is NC = P ? In complexity theory, the class NC (for Nick s Class ) is the set of decision problems decidable in polylogarithmic time on a parallel computer with a polynomial number of processors. In… …   Wikipedia

  • Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …   Wikipedia

  • Complex instruction set computing — A complex instruction set computer (CISC) (  /ˈsɪs …   Wikipedia

  • Explicitly parallel instruction computing — (EPIC) is a term coined in 1997 by the HP Intel alliance [cite web url = http://www.hpl.hp.com/techreports/1999/HPL 1999 111.pdf title = EPIC: An Architecture for Instruction Level Parallel Processors accessdate = 2008 05 08 last = Schlansker and …   Wikipedia

  • complex instruction set computing —    Abbreviated CISC, pronounced [sisk]. A processor that can recognize and execute more than 100 different assembly language, or low level, instructions. CISC processors can be powerful, but the instructions take a high number of clock cycles to… …   Dictionary of networking

  • NISC — This page describes methods and tools that support no instruction set computer (NISC) technology. NISC is a new architecture and compiler technology for designing custom processors and hardware accelerators. Overview NISC is a Statically… …   Wikipedia


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